I am currently pursuing my degree in Electronics and Communication Engineering. My academic work and projects focus on hardware acceleration, digital signal processing, and FPGA-based design. At present, I am interning at the DSP Lab, Raman Research Institute under Prof. Prabu, where I am working on FPGA digital design verification. My role involves developing and applying MATLAB-based test vector generation workflows to validate FPGA implementations of signal processing algorithms, aimed at ensuring reliability and performance for large-scale radio receiver systems.
Systolic Array Accelerator for Matrix Multiplication
Designing FPGA-based hardware accelerator based on a systolic array architecture, focused on efficient matrix multiplication for Machine Learning workloads. The architecture includes support for IEEE 754 FP16 floating-point arithmetic, implemented entirely in Verilog. The design emphasizes pipelined dataflow and scalable architecture to explore high-performance digital implementation techniques.
Read More about "Systolic Array Accelerator"Avionics System Design
Designed the flight computer PCB in Altium Designer, integrating navigational sensors (IMU, barometer, GPS/GNSS/IRNSS), MCU, power modules, and recovery system circuitry. Developed firmware for real-time sensor processing, apogee detection, and telemetry communication with the ground station.
Read More about "Avionics System Design"Skills
- Hardware Description Languages: Verilog, VHDL
- FPGA Tools: Xilinx Vivado, Intel Quartus
- Programming Languages: Python, C/C++, Tcl
- PCB Design: Altium Designer